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IET Computers and Digital Techniques Q3

期刊收录：
SCIE
Scopus
DOAJ

基本信息

期刊ISSN：
1751-8601
期刊简拼：
IET COMPUT DIGIT TEC
年发文章数：
14
E-ISSN：
1751-861X
Gold OA文章占比
69.64%
研究文章占比：
92.86%
是否OA：
Yes
Jcr分区：
Q3
中科院分区：
4区

出版信息

出版商：
Wiley
涉及研究方向：
工程技术-计算机：理论方法
出版国家：
ENGLAND
出版语言：
English
出版周期：
Bi-monthly
出版年份：
2007

2023-2024最新影响因子:1.1
自引率:9.10%
五年影响因子:0.9
JCI期刊引文指标:0.25
h-index:40
CiteScore:3.50

期刊关键词

3区 SCIE Scopus DOAJ 计算机科学 4区 COMPUTER SCIENCE HARDWARE & ARCHITECTURE 计算机：硬件 THEORY & METHODS 计算机：理论方法

期刊简介

IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.

The key subject areas of interest are:

Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation.

Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance.

Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues.

Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware.

Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting.

Case Studies: emerging applications, applications in industrial designs, and design frameworks.

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期刊简写：IET COMPUT DIGIT TEC

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